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1. general description the 74hc4094; 74hct4094 are high-spe ed si-gate cmos devices and are pin compatible with the 4094 of the 4000b seri es. it is specified in compliance with jedec standard no. 7a. the 74hc4094; 74hct4094 is an 8-stage serial shift register. it has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs qp0 to qp7. the parallel outputs may be connected directly to common bus lines. data is shifted on positive-going clock transitions. the data in each shift register stage is transferred to the storage register wh en the strobe (str) input is high. data in the storage register appears at the outputs wh enever the output enable (oe) signal is high. two serial outputs (qs1 and qs2) are available for cascading a number of 74hc4094; 74hct4094 devices. serial data is availabl e at qs1 on positive-going clock edges to allow high-speed operation in cascaded system s with a fast clock rise time. the same serial data is available at qs2 on the next negative going clock edge. this is used for cascading 74hc4094; 74hct4 094 devices when the clock has a slow rise time. 2. features and benefits ? low-power dissipation ? esd protection: ? hbm jesd22-a114f exceeds 2 000 v ? mm jesd22-a115-a exceeds 200 v ? specified from ? 40 cto+85 c and from ? 40 cto+125 c 3. applications ? serial-to-parallel data conversion ? remote control holding register 74hc4094; 74hct4094 8-stage shift-and-s tore bus register rev. 3 ? 14 february 2011 product data sheet
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 2 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register 4. ordering information 5. functional diagram table 1. ordering information type number package temperature range name description version 74hc4094n ? 40 c to +125 c dip16 plastic dual in-line package; 16 leads (300 mil) sot38-4 74HCT4094N 74hc4094d ? 40 c to +125 c so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 74hct4094d 74hc4094db ? 40 c to +125 c ssop16 plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 74hct4094db 74hc4094pw ? 40 c to +125 c tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 fig 1. functional diagram fig 2. logic symbol 15 2 oe d cp str 31 qp0 qp1 qp2 qp3 qp4 qp5 qp6 qp7 qs1 qs2 9 10 4 5 6 7 14 13 12 11 001aaf11 1 001aaf11 2 24 c1/ 1d en3 srg8 c2 5 6 7 14 13 12 11 9 10 3 2d 3 15 1
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 3 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register fig 3. logic diagram 001aaf1 19 8-stage shift register 8-bit storage register 3-state outputs d 2 qs2 10 qs1 qp0 4 5 6 7 14 13 12 11 qp1 qp2 qp3 qp4 qp5 qp6 qp7 9 cp 3 str 1 oe 15 fig 4. logic diagram 001aag799 d d cp cp q ff 0 d le q latch 0 d cp q ff 7 d le q latch 7 d cp q stages 1 to 6 stage 0 stage 7 qp2 qp0 d qs2 qs1 le q latch qp1 qp4 qp3 qp6 qp5 qp7 str oe
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 4 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register 6. pinning information 6.1 pinning 6.2 pin description fig 5. pin configuration dip16 and so16 fig 6. pin configuration ssop16 and tssop16 74hc4094 74hct4094 str v cc doe cp qp4 qp0 qp5 qp1 qp6 qp2 qp7 qp3 qs2 gnd qs1 001aan577 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 74hc4094 74hct4094 str v cc doe cp qp4 qp0 qp5 qp1 qp6 qp2 qp7 qp3 qs2 gnd qs1 001aan578 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 table 2. pin description symbol pin description str 1 strobe input d 2 data input cp 3 clock input qp0 to qp7 4, 5, 6, 7, 14, 13, 12, 11 parallel output v ss 8 ground supply voltage qs1, qs2 9, 10 serial output oe 15 output enable input v dd 16 supply voltage
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 5 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register 7. functional description [1] at the positive clock edge, the information in the 7th regist er stage is transferred to the 8th register stage and the qsn o utputs. h = high voltage level; l = low voltage level; x = don?t care; = positive-going transition; = negative-going transition; z = high-impedance off-state; nc = no change; q6s = the data in register stage 6 before the low to high clock transition; q7s = the data in register stage 7 before the high to low clock transition. table 3. function table [1] inputs parallel outputs serial outputs cp oe str d qp0 qpn qs1 qs2 l xxzzq6snc l xxzzncq7s hl xncncq6snc hhl l qpn ? 1q6s nc hhhhqpn ? 1q6s nc h h h ncncncq7s fig 7. timing diagram 001aaf1 17 clock input data input strobe input output enable input internal q0s (ff 0) output qp0 internal q6s (ff 6) output qp6 serial output qs1 serial output qs2 z-state z-state
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 6 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register 8. limiting values [1] for dip16 package: p tot derates linearly with 12 mw/k above 70 c. [2] for so16: p tot derates linearly with 8 mw/k above 70 c. for ssop16 and tssop16 packages: p tot derates linearly with 5.5 mw/k above 60 c. 9. recommended operating conditions table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +7 v i ik input clamping current v i < ? 0.5 v or v i >v cc +0.5 v - 20 ma i ok output clamping current v o < ? 0.5 v or v o >v cc +0.5v - 20 ma i o output current v o = ? 0.5 v to (v cc +0.5v) - 25 ma i cc supply current - +50 ma i gnd ground current - ? 50 ma t stg storage temperature ? 65 +150 c p tot total power dissipation dip16 package [1] - 750 mw so16, ssop16 and tssop16 packages [2] - 500 mw table 5. recommended operating conditions voltages are referenced to gnd (ground = 0 v) symbol parameter conditions 74hc4094 74hct4094 unit min typ max min typ max v cc supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 v v i input voltage 0 - v cc 0- v cc v v o output voltage 0 - v cc 0- v cc v t amb ambient temperature ? 40 +25 +125 ? 40 +25 +125 c t/ v input transition rise and fall rate v cc = 2.0 v - - 625 - - - ns/v v cc = 4.5 v - 1.67 139 - 1.67 139 ns/v v cc = 6.0 v--83---ns/v
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 7 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register 10. static characteristics table 6. static characteristics at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions 25 c ? 40 c to +85 c ? 40 c to +125 c unit min typ max min max min max 74hc4094 v ih high-level input voltage v cc = 2.0 v 1.5 1.2 - 1.5 - 1.5 - v v cc = 4.5 v 3.15 2.4 - 3.15 - 3.15 - v v cc = 6.0 v 4.2 3.2 - 4.2 - 4.2 - v v il low-level input voltage v cc = 2.0 v - 0.8 0.5 - 0.5 - 0.5 v v cc = 4.5 v - 2.1 1.35 - 1.35 - 1.35 v v cc = 6.0 v - 2.8 1.8 - 1.8 - 1.8 v v oh high-level output voltage v i =v ih or v il i o = ? 20 a; v cc = 2.0 v 1.9 2.0 - 1.9 - 1.9 - v i o = ? 20 a; v cc = 4.5 v 4.4 4.5 - 4.4 - 4.4 - v i o = ? 20 a; v cc = 6.0 v 5.9 6.0 - 5.9 - 5.9 - v i o = ? 4.0 ma; v cc = 4.5 v 3.98 4.32 - 3.84 - 3.7 - v i o = ? 5.2 ma; v cc = 6.0 v 5.48 5.81 - 5.34 - 5.2 - v v ol low-level output voltage v i =v ih or v il i o =20 a; v cc = 2.0 v - 0 0.1 - 0.1 - 0.1 v i o =20 a; v cc = 4.5 v - 0 0.1 - 0.1 - 0.1 v i o =20 a; v cc = 6.0 v - 0 0.1 - 0.1 - 0.1 v i o = 4.0 ma; v cc = 4.5 v - 0.15 0.26 - 0.33 - 0.4 v i o = 5.2 ma; v cc = 6.0 v - 0.16 0.26 - 0.33 - 0.4 v i i input leakage current v i =v cc or gnd; v cc =6.0v -- 0.1 - 1.0 - 1.0 a i oz off-state output current v i =v ih or v il ; v o =v cc or gnd; v cc =6.0v -- 0.5 - 5.0 - 10.0 a i cc supply current v i =v cc or gnd; i o =0a; v cc =6.0v - - 8.0 - 80 - 160 a c i input capacitance -3.5- pf 74hct4094 v ih high-level input voltage v cc = 4.5 v to 5.5 v 2.0 1.6 - 2.0 - 2.0 - v v il low-level input voltage v cc = 4.5 v to 5.5 v - 1.2 0.8 - 0.8 - 0.8 v v oh high-level output voltage v i =v ih or v il ; v cc =4.5v i o = ? 20 a 4.4 4.5 - 4.4 - 4.4 - v i o = ? 4.0 ma 3.98 4.32 - 3.84 - 3.7 - v v ol low-level output voltage v i =v ih or v il ; v cc =4.5v i o =20 a - 0 0.1 - 0.1 - 0.1 v i o = 4.0 ma - 0.15 0.26 - 0.33 - 0.4 v
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 8 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register i i input leakage current v i =v cc or gnd; v cc =5.5v -- 0.1 - 1.0 - 1.0 a i oz off-state output current v i =v ih or v il ; v cc =5.5v; v o =v cc or gnd per input pin; other inputs at v cc or gnd; i o =0a -- 0.5 - 5.0 - 10 a i cc supply current v i =v cc or gnd; i o =0a; v cc =5.5v - - 8.0 - 80 - 160 a i cc additional supply current v i =v cc ? 2.1 v; other inputs at v cc or gnd; v cc = 4.5 v to 5.5 v; i o =0a per input pin; str input - 100 360 - 450 - 490 a per input pin; oe input - 150 540 - 675 - 735 a per input pin; cp input - 150 540 - 675 - 735 a per input pin; d input - 40 144 - 180 - 196 a c i input capacitance -3.5- pf table 6. static characteristics ?continued at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions 25 c ? 40 c to +85 c ? 40 c to +125 c unit min typ max min max min max
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 9 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register 11. dynamic characteristics table 7. dynamic characteristics voltages are referenced to gnd (ground = 0 v); c l = 50 pf unless otherwise specified; for test circuit see figure 12 . symbol parameter conditions 25 c ? 40 c to +85 c ? 40 c to +125 c unit min typ max min max min max 74hc4094 t pd propagation delay cp to qs1; see figure 8 [1] v cc = 2.0 v - 50 150 - 190 - 225 ns v cc = 4.5 v - 18 30 - 38 - 45 ns v cc =5v; c l =15pf - 15 - - - - - ns v cc = 6.0 v - 14 26 - 33 - 38 ns cp to qs2; see figure 8 [1] v cc = 2.0 v - 44 135 - 170 - 205 ns v cc = 4.5 v - 16 27 - 34 - 41 ns v cc =5v; c l =15pf - 13 - - - - - ns v cc = 6.0 v - 13 23 - 29 - 35 ns cp to qpn; see figure 8 [1] v cc = 2.0 v - 63 195 - 245 - 295 ns v cc = 4.5 v - 23 39 - 49 - 59 ns v cc =5v; c l =15pf - 20 - - - - - ns v cc = 6.0 v - 18 33 - 42 - 50 ns str to qpn; see figure 9 [1] v cc = 2.0 v - 58 180 - 225 - 270 ns v cc = 4.5 v - 21 36 - 45 - 54 ns v cc =5v; c l =15pf - 18 - - - - - ns v cc = 6.0 v - 17 31 - 38 - 46 ns t en enable time oe to qpn; see figure 11 [2] v cc = 2.0 v - 55 175 - 220 - 265 ns v cc = 4.5 v - 20 35 - 44 - 53 ns v cc = 6.0 v - 16 30 - 37 - 45 ns t dis disable time oe to qpn; see figure 11 [3] v cc = 2.0 v - 41 125 - 155 - 190 ns v cc = 4.5 v - 15 25 - 31 - 38 ns v cc = 6.0 v - 12 21 - 26 - 32 ns t t transition time qpn; see figure 8 [4] v cc = 2.0 v - 19 75 - 95 - 110 ns v cc = 4.5 v - 7 15 - 19 - 22 ns v cc = 6.0 v - 6 13 - 16 - 19 ns
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 10 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register t w pulse width cp high or low; see figure 8 v cc = 2.0 v 80 14 - 100 - 120 - ns v cc = 4.5 v 16 5 - 20 - 24 - ns v cc = 6.0 v 14 4 - 17 - 20 - ns str high; see figure 9 v cc = 2.0 v 80 14 - 100 - 120 - ns v cc = 4.5 v 16 5 - 20 - 24 - ns v cc = 6.0 v 14 4 - 17 - 20 - ns t su set-up time d to cp; see figure 10 v cc = 2.0 v 50 14 - 65 - 75 - ns v cc = 4.5 v 10 5 - 13 - 15 - ns v cc = 6.0 v 9 4 - 11 - 13 - ns cp to str; see figure 9 v cc = 2.0 v 100 28 - 125 - 150 - ns v cc = 4.5 v 20 10 - 25 - 30 - ns v cc = 6.0 v 17 8 - 21 - 26 - ns t h hold time d to cp; see figure 10 v cc = 2.0 v 3 -6 - 3 - 3 - ns v cc = 4.5 v 3 -2 - 3 - 3 - ns v cc = 6.0 v 3 -2 - 3 - 3 - ns cp to str; see figure 9 v cc = 2.0 v 0 -14 - 0 - 0 - ns v cc = 4.5 v 0 -5 - 0 - 0 - ns v cc = 6.0 v 0 -4 - 0 - 0 - ns f max maximum frequency cp; see figure 8 v cc = 2.0 v 6.0 28 - 4.8 - 4.0 - mhz v cc = 4.5 v 30 87 - 24 - 20 - mhz v cc =5v; c l =15pf - 95 - - - - - mhz v cc = 6.0 v 35 103 - 28 - 24 - mhz c pd power dissipation capacitance c l = 50 pf; f = 1 mhz; v i =gndtov cc [5] -83- - - - -pf table 7. dynamic characteristics ?continued voltages are referenced to gnd (ground = 0 v); c l = 50 pf unless otherwise specified; for test circuit see figure 12 . symbol parameter conditions 25 c ? 40 c to +85 c ? 40 c to +125 c unit min typ max min max min max
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 11 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register [1] t pd is the same as t plh and t phl . [2] t en is the same as t pzh and t pzl . 74hct4094 t pd propagation delay cp to qs1; see figure 8 [1] v cc = 4.5 v - 23 39 - 49 - 59 ns v cc =5v; c l =15pf - 19 - - - - - ns cp to qs2; see figure 8 [1] v cc = 4.5 v - 21 36 - 45 - 54 ns v cc =5v; c l =15pf - 18 - - - - - ns cp to qpn; see figure 8 [1] v cc = 4.5 v - 25 43 - 54 - 65 ns v cc =5v; c l =15pf - 21 - - - - - ns str to qpn; see figure 9 [1] v cc = 4.5 v - 22 39 - 49 - 59 ns v cc =5v; c l =15pf - 19 - - - - - ns t en enable time oe to qpn; see figure 11 [2] v cc = 4.5 v - 20 35 - 44 - 53 ns t dis disable time oe to qpn; see figure 11 [3] v cc = 4.5 v - 21 35 - 44 - 53 ns t t transition time qpn; see figure 8 [4] v cc = 4.5 v - 7 15 - 19 - 22 ns t w pulse width cp high or low; see figure 8 v cc = 4.5 v 16 7 - 20 - 24 - ns str high; see figure 9 v cc = 4.5 v 16 5 - 20 - 24 - ns t su set-up time dn to cp; see figure 10 v cc = 4.5 v 10 4 - 13 - 15 - ns cp to str; see figure 9 v cc = 4.5 v 20 9 - 25 - 30 - ns t h hold time dn to cp; see figure 10 v cc = 4.5 v 4 0 - 4 - 4 - ns cp to str; see figure 9 v cc = 4.5 v 0 ? 4- 0 - 0 - ns f max maximum frequency cp; see figure 8 v cc = 4.5 v 30 80 - 24 - 20 - mhz v cc =5v; c l =15pf - 86 - - - - - mhz c pd power dissipation capacitance c l = 50 pf; f = 1 mhz; v i =gndtov cc [5] -92- - - - -pf table 7. dynamic characteristics ?continued voltages are referenced to gnd (ground = 0 v); c l = 50 pf unless otherwise specified; for test circuit see figure 12 . symbol parameter conditions 25 c ? 40 c to +85 c ? 40 c to +125 c unit min typ max min max min max
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 12 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register [3] t dis is the same as t plz and t phz . [4] t t is the same as t thl and t tlh . [5] c pd is used to determine the dynamic power dissipation (p d in w). p d =c pd v cc 2 f i n+ (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; (c l v cc 2 f o ) = sum of outputs. 12. waveforms measurement points are given in table 8 . v ol and v oh are typical voltage output levels that occur with the output load. fig 8. propagation delay input (cp) to output (qpn, qs1, qs2), output transition ti me, clock input (cp) pulse width and the maximum frequency (cp) 1/f max t w t phl t plh v i gnd v oh v ol qpn, qs1 output cp input v m v m 001aaf11 3 t phl t plh v oh v ol qs2 output v m
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 13 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register measurement points are given in table 8 . v ol and v oh are typical voltage output levels that occur with the output load. fig 9. propagation delay strobe input (str) to output (qpn), strobe input (str) pulse width and the clock set-up and hold times for strobe input t w t phl t plh t h v i gnd v oh v ol qpn output str input v m v m 001aaf11 4 t su v i gnd cp input v m measurement points are given in table 8 . v ol and v oh are typical voltage output levels that occur with the output load. fig 10. the data input (d) to clock in put (cp) set-up times and clock input (cp) to data input (d) hold times 001aaf11 5 gnd gnd t h t su t h t su v m v m v m v i v oh v ol v i qpn, qs1, qs2 output cp input d input
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 14 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register measurement points are given in table 8 . v ol and v oh are typical voltage output levels that occur with the output load. fig 11. enable and disable times 001aaf11 6 t plz t phz outputs disabled outputs enabled outputs enabled output low-to-off off-to-low output high-to-off off-to-high oe input v m v i v ol v oh gnd v y v x t pzl t pzh v m v m v cc gnd table 8. measurement points type input output v m v m 74hc4094 0.5v cc 0.5v cc 74hct4094 1.3 v 1.3 v
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 15 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register test data is given in table 9 . definitions test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. r l = load resistance. s1 = test selection switch. fig 12. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aad98 3 dut v cc v cc v i v o r t r l s1 c l open g table 9. test data type input load s1 position v i t r , t f c l r l t phl , t plh t pzh , t phz t pzl , t plz 74hc4094 v cc 6ns 15pf, 50 pf 1k open gnd v cc 74hct4094 3 v 6 ns 15 pf, 50 pf 1 k open gnd v cc
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 16 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register 13. package outline fig 13. package outline sot38-4 (dip16) references outline version european projection issue date iec jedec jeita sot38-4 95-01-14 03-02-13 m h c (e ) 1 m e a l seating plane a 1 w m b 1 b 2 e d a 2 z 16 1 9 8 e pin 1 index b 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. unit a max. 12 b 1 (1) (1) (1) b 2 cd e e m z h l mm dimensions (inch dimensions are derived from the original mm dimensions) a min. a max. b max. w m e e 1 1.73 1.30 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 0.76 4.2 0.51 3.2 inches 0.068 0.051 0.021 0.015 0.014 0.009 1.25 0.85 0.049 0.033 0.77 0.73 0.26 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.03 0.17 0.02 0.13 d ip16: plastic dual in-line package; 16 leads (300 mil) sot38 -4
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 17 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register fig 14. package outline sot109-1 (so16) x w m a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale s o16: plastic small outline package; 16 leads; body width 3.9 mm sot109 -1
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 18 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register fig 15. package outline sot338-1 (ssop16) unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 7.9 7.6 1.03 0.63 0.9 0.7 1.00 0.55 8 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot338-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 1 8 16 9 a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale s sop16: plastic shrink small outline package; 16 leads; body width 5.3 mm sot338 -1 a max. 2
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 19 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register fig 16. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403 -1 a max. 1.1 pin 1 index
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 20 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register 14. abbreviations 15. revision history table 10. abbreviations acronym description cmos complementary metal oxide semiconductor esd electrostatic discharge hbm human body model mm machine model table 11. revision history document id release date data sheet status change notice supersedes 74hc_hct4094 v.3 20110214 product data sheet - 74hc_hct4094_cnv v.2 modifications: ? the format of this data sheet has been redesigned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to the new company name where appropriate. 74hc_hct4094_cnv v.2 19970901 product specification - -
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 21 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 16.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 16.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interrupt ion, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qua lified for use in automotive applications. the product is not desi gned, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be ex pected to result in personal injury, death or severe property or environmental dam age. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this docu ment contains the product specification.
74hc_hct4094 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 3 ? 14 february 2011 22 of 23 nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from national authorities. 16.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 17. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74hc4094; 74hct4094 8-stage shift-and-store bus register ? nxp b.v. 2011. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 14 february 2011 document identifier: 74hc_hct4094 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 functional description . . . . . . . . . . . . . . . . . . . 5 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 9 recommended operating conditions. . . . . . . . 6 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 7 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 9 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 20 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 21 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 21 16.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 16.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22 17 contact information. . . . . . . . . . . . . . . . . . . . . 22 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

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